#modified version for BLANCA board

CONFIG stepping="0";

NET clk period = 40.000 ;
OFFSET = out : 20.000 : AFTER clk ;
OFFSET = in : 8.000 : BEFORE clk ;

NET clk3 period = 40.000 ;

NET erx_clk PERIOD = 40.000 ;
OFFSET = in : 10.000 : BEFORE erx_clk ;
NET etx_clk PERIOD = 40.000 ;
OFFSET = out : 20.000 : AFTER etx_clk ;
OFFSET = in : 10.000 : BEFORE etx_clk ;

#NET usb_clkout period = 16.667;
#OFFSET = out : 10.000 : AFTER usb_clkout ;
#OFFSET = in : 8.000 : BEFORE usb_clkout ;

NET "clkm" 		TNM_NET = "clkm";


##################################################################
# Enable these is you have enabled the SVGA clock generator

NET vid_clock period = 15.000 ;
NET "clk50" 		TNM_NET = "clk50";
NET "video_clk" 	TNM_NET = "video_clk";
TIMESPEC "TS_clkm_vidclk" = FROM "clkm" TO "video_clk" TIG;
TIMESPEC "TS_clk50_vidclk" = FROM "clk50" TO "video_clk" TIG;
TIMESPEC "TS_vidclk_clkm" = FROM "video_clk" TO "clkm" TIG;

##################################################################

#INST "clkgen0_xc3s_v_dll0" LOC = DCM_X1Y0;
#INST "clkgen0_xc3s_v_sd0_dll1" LOC = DCM_X0Y0;
#INST "clkgen0_v_dll0" LOC = DCM_X1Y0;
#INST "clkgen0_v_dll1" LOC = DCM_X0Y0;
#INST "clkgen0/v/dll0" LOC = DCM_X1Y0;
#INST "clkgen0/v/dll1" LOC = DCM_X0Y0;
#INST "clkgen0/xc3s.v/dll0" LOC = DCM_X1Y0;
#INST "clkgen0/xc3s.v/sd0.dll1" LOC = DCM_X0Y0;
#INST "clkgen0.xc3s.v.dll0" LOC = DCM_X1Y0;
#INST "clkgen0.xc3s.v.sd0.dll1" LOC = DCM_X0Y0;


#NET "clk" LOC = "aa11" | IOSTANDARD = LVTTL;   #48MHz clock
NET "clk" LOC = "y11" | IOSTANDARD = LVTTL;   #25MHz clock
#NET "clk2" LOC = "ab12" | IOSTANDARD = LVTTL; 
NET "clk3" LOC = "a11" | IOSTANDARD = LVTTL;   #25MHz clock
NET "resetn" LOC = "aa3" | IOSTANDARD = LVTTL | PULLUP;



#NET "address(0)" LOC = "u16" | IOSTANDARD = LVTTL;
#NET "address(1)" LOC = "u17" | IOSTANDARD = LVTTL;
NET "address(2)" LOC = "j2" | IOSTANDARD = LVTTL;
NET "address(3)" LOC = "l1" | IOSTANDARD = LVTTL;
NET "address(4)" LOC = "j1" | IOSTANDARD = LVTTL; 
NET "address(5)" LOC = "h4" | IOSTANDARD = LVTTL; 
NET "address(6)" LOC = "j4" | IOSTANDARD = LVTTL; 
NET "address(7)" LOC = "k4" | IOSTANDARD = LVTTL; 
NET "address(8)" LOC = "k3" | IOSTANDARD = LVTTL;
NET "address(9)" LOC = "l4" | IOSTANDARD = LVTTL;
NET "address(10)" LOC = "l3" | IOSTANDARD = LVTTL; 
NET "address(11)" LOC = "g2" | IOSTANDARD = LVTTL; 
NET "address(12)" LOC = "k1" | IOSTANDARD = LVTTL;
NET "address(13)" LOC = "y3" | IOSTANDARD = LVTTL;
#NET "address(14)" LOC = "l2" | IOSTANDARD = LVTTL;
NET "address(15)" LOC = "l2" | IOSTANDARD = LVTTL; 
NET "address(16)" LOC = "k2" | IOSTANDARD = LVTTL;
#NET "address(17)" LOC = "v22" | IOSTANDARD = LVTTL;
#NET "address(18)" LOC = "v21" | IOSTANDARD = LVTTL; 
#NET "address(19)" LOC = "t17" | IOSTANDARD = LVTTL; 
#NET "address(20)" LOC = "u18" | IOSTANDARD = LVTTL;
#NET "address(21)" LOC = "w13" | IOSTANDARD = LVTTL;
#NET "address(22)" LOC = "w14" | IOSTANDARD = LVTTL; 
#NET "address(23)" LOC = "u14" | IOSTANDARD = LVTTL; 
#NET "address(24)" LOC = "v14" | IOSTANDARD = LVTTL;
#NET "address(25)" LOC = "u13" | IOSTANDARD = LVTTL;
#NET "address(26)" LOC = "v13" | IOSTANDARD = LVTTL;
#NET "address(27)" LOC = "y13" | IOSTANDARD = LVTTL;

NET "data(0)" LOC = "v1" | IOSTANDARD = LVTTL;
NET "data(1)" LOC = "u3" | IOSTANDARD = LVTTL;
NET "data(2)" LOC = "t2" | IOSTANDARD = LVTTL;
NET "data(3)" LOC = "t1" | IOSTANDARD = LVTTL;
NET "data(4)" LOC = "r2" | IOSTANDARD = LVTTL;
NET "data(5)" LOC = "r1" | IOSTANDARD = LVTTL;
NET "data(6)" LOC = "p2" | IOSTANDARD = LVTTL;
NET "data(7)" LOC = "p1" | IOSTANDARD = LVTTL;
NET "data(8)" LOC = "r4" | IOSTANDARD = LVTTL;
NET "data(9)" LOC = "t4" | IOSTANDARD = LVTTL;
NET "data(10)" LOC = "t3" | IOSTANDARD = LVTTL; 
NET "data(11)" LOC = "n4" | IOSTANDARD = LVTTL;
NET "data(12)" LOC = "m1" | IOSTANDARD = LVTTL;
NET "data(13)" LOC = "v2" | IOSTANDARD = LVTTL;
NET "data(14)" LOC = "w2" | IOSTANDARD = LVTTL;
NET "data(15)" LOC = "y1" | IOSTANDARD = LVTTL;
NET "data(16)" LOC = "c1" | IOSTANDARD = LVTTL;
NET "data(17)" LOC = "e1" | IOSTANDARD = LVTTL;
NET "data(18)" LOC = "c4" | IOSTANDARD = LVTTL;
NET "data(19)" LOC = "c3" | IOSTANDARD = LVTTL;
NET "data(20)" LOC = "d2" | IOSTANDARD = LVTTL;
NET "data(21)" LOC = "d1" | IOSTANDARD = LVTTL;
NET "data(22)" LOC = "d3" | IOSTANDARD = LVTTL;
NET "data(23)" LOC = "c2" | IOSTANDARD = LVTTL;
NET "data(24)" LOC = "e3" | IOSTANDARD = LVTTL;
NET "data(25)" LOC = "f4" | IOSTANDARD = LVTTL;
NET "data(26)" LOC = "e2" | IOSTANDARD = LVTTL;
NET "data(27)" LOC = "f3" | IOSTANDARD = LVTTL;
NET "data(28)" LOC = "f2" | IOSTANDARD = LVTTL;
NET "data(29)" LOC = "g1" | IOSTANDARD = LVTTL;
NET "data(30)" LOC = "g3" | IOSTANDARD = LVTTL;
NET "data(31)" LOC = "g4" | IOSTANDARD = LVTTL;
NET "sdcasn" LOC = "y2" | IOSTANDARD = LVTTL;
NET "sdclk" LOC = "n3" | IOSTANDARD = LVTTL;
NET "sdcsn(0)" LOC = "w1" | IOSTANDARD = LVTTL;
#NET "sdcsn(1)" LOC = "w9" | IOSTANDARD = LVTTL;
NET "sddqm(0)" LOC = "n2" | IOSTANDARD = LVTTL;
NET "sddqm(1)" LOC = "p4" | IOSTANDARD = LVTTL;
NET "sddqm(2)" LOC = "h1" | IOSTANDARD = LVTTL;
NET "sddqm(3)" LOC = "h2" | IOSTANDARD = LVTTL;
NET "sdrasn" LOC = "m2" | IOSTANDARD = LVTTL;
NET "sdwen" LOC = "n1" | IOSTANDARD = LVTTL;
NET "sdcke" LOC = "m3" | IOSTANDARD = LVTTL;

NET "pllref"  LOC = "v8"  | IOSTANDARD = LVTTL;# sdclkfb
#NET "bexcn" LOC = "aa7" | IOSTANDARD = LVTTL;
#NET "brdyn" LOC = "ab7" | IOSTANDARD = LVTTL; 


NET "rxd1" LOC = "u13" | IOSTANDARD = LVTTL;
NET "txd1" LOC = "ab12" | IOSTANDARD = LVTTL;
NET "ctsn1" LOC = "v13" | IOSTANDARD = LVTTL;
NET "rtsn1" LOC = "w13" | IOSTANDARD = LVTTL;
#NET "ctsn2" LOC = "k3" | IOSTANDARD = LVTTL; #debug UART doesn't use ctsn,rtsn
#NET "rtsn2" LOC = "k4" | IOSTANDARD = LVTTL;
NET "rxd2" LOC = "v3" | IOSTANDARD = LVTTL;
NET "txd2" LOC = "v4" | IOSTANDARD = LVTTL;
NET "uart_en" LOC ="u4" | IOSTANDARD = LVTTL;


#NET "emdint" LOC = "c2" | IOSTANDARD = LVTTL | PULLUP; 
NET "emdio_ip" LOC = "w10" | IOSTANDARD = LVTTL; #break emdio into 3 signal 
NET "emdio_op" LOC = "w8" | IOSTANDARD = LVTTL; #break emdio into 3 signal 
NET "emdio_oep" LOC = "v8" | IOSTANDARD = LVTTL; #break emdio into 3 signal
NET "erx_clk" LOC = "w17" | IOSTANDARD = LVTTL; 
NET "erx_clk" CLOCK_DEDICATED_ROUTE = FALSE;

NET "erx_col" LOC = "ab11" | IOSTANDARD = LVTTL;
NET "erx_crs" LOC = "u9" | IOSTANDARD = LVTTL;
NET "erx_dv" LOC = "v10" | IOSTANDARD = LVTTL;
NET "erx_er" LOC = "ab13" | IOSTANDARD = LVTTL;
NET "erxd(0)" LOC = "aa13" | IOSTANDARD = LVTTL;
NET "erxd(1)" LOC = "u11" | IOSTANDARD = LVTTL;
NET "erxd(2)" LOC = "y13" | IOSTANDARD = LVTTL;
NET "erxd(3)" LOC = "v5" | IOSTANDARD = LVTTL;
NET "emdc" LOC = "v9" | IOSTANDARD = LVTTL;
NET "etx_clk" LOC = "aa16" | IOSTANDARD = LVTTL; 
NET "etx_clk" CLOCK_DEDICATED_ROUTE = FALSE;

NET "etx_en" LOC = "aa19" | IOSTANDARD = LVTTL;
NET "etx_er" LOC = "v17" | IOSTANDARD = LVTTL;
NET "etxd(0)" LOC = "v14" | IOSTANDARD = LVTTL;
NET "etxd(1)" LOC = "ab16" | IOSTANDARD = LVTTL;
NET "etxd(2)" LOC = "w14" | IOSTANDARD = LVTTL;
NET "etxd(3)" LOC = "u14" | IOSTANDARD = LVTTL;


#NET "iosn" LOC = "u12" | IOSTANDARD = LVTTL;
#NET "oen" LOC = "ab4" | IOSTANDARD = LVTTL; 
#NET "pio(0)" LOC = "h5" | IOSTANDARD = LVTTL;
#NET "pio(1)" LOC = "g5" | IOSTANDARD = LVTTL;
#NET "pio(10)" LOC = "j5" | IOSTANDARD = LVTTL;
#NET "pio(11)" LOC = "j6" | IOSTANDARD = LVTTL;
#NET "pio(12)" LOC = "j1" | IOSTANDARD = LVTTL;
#NET "pio(13)" LOC = "j2" | IOSTANDARD = LVTTL;
#NET "pio(14)" LOC = "k5" | IOSTANDARD = LVTTL;
#NET "pio(15)" LOC = "k6" | IOSTANDARD = LVTTL;
#NET "pio(2)" LOC = "g3" | IOSTANDARD = LVTTL;
#NET "pio(3)" LOC = "g4"  | IOSTANDARD = LVTTL;
#NET "pio(4)" LOC = "g1" | IOSTANDARD = LVTTL;
#NET "pio(5)" LOC = "g2"  | IOSTANDARD = LVTTL;
#NET "pio(6)" LOC = "h1" | IOSTANDARD = LVTTL;
#NET "pio(7)" LOC = "h2" | IOSTANDARD = LVTTL;
#NET "pio(8)" LOC = "j4" | IOSTANDARD = LVTTL;
#NET "pio(9)" LOC = "h4"  | IOSTANDARD = LVTTL;

NET "ps2clk_ip(0)" LOC = "y7" | IOSTANDARD = LVTTL; #break ps2clk into 3 signal
NET "ps2clk_op(0)" LOC = "w6" | IOSTANDARD = LVTTL; #break ps2clk into 3 signal
NET "ps2clk_oep(0)" LOC = "w9" | IOSTANDARD = LVTTL; #break ps2clk into 3 signal
NET "ps2data_ip(0)" LOC = "y6" | IOSTANDARD = LVTTL; #break ps2data into 3 signal
NET "ps2data_op(0)" LOC = "v6" | IOSTANDARD = LVTTL; #break ps2data into 3 signal
NET "ps2data_oep(0)" LOC = "y5" | IOSTANDARD = LVTTL; #break ps2data into 3 signal
NET "ps2clk_ip(1)" LOC = "w5" | IOSTANDARD = LVTTL; #break ps2clk into 3 signal
NET "ps2clk_op(1)" LOC = "aa4" | IOSTANDARD = LVTTL; #break ps2clk into 3 signal
NET "ps2clk_oep(1)" LOC = "ab4" | IOSTANDARD = LVTTL; #break ps2clk into 3 signal
NET "ps2data_ip(1)" LOC = "u6" | IOSTANDARD = LVTTL; #break ps2data into 3 sinals
NET "ps2data_op(1)" LOC = "aa6" | IOSTANDARD = LVTTL; #break ps2data into 3 sinals
NET "ps2data_oep(1)" LOC = "aa7" | IOSTANDARD = LVTTL; #break ps2data into 3 sinals

#NET "ramoen(0)" LOC = "u10" | IOSTANDARD = LVTTL;
#NET "ramoen(1)" LOC = "u11" | IOSTANDARD = LVTTL;
#NET "ramoen(2)" LOC = "v10" | IOSTANDARD = LVTTL;
#NET "ramoen(3)" LOC = "u9" | IOSTANDARD = LVTTL;
#NET "ramoen(4)" LOC = "u7" | IOSTANDARD = LVTTL;
#NET "ramsn(0)" LOC = "aa4" | IOSTANDARD = LVTTL;
#NET "ramsn(1)" LOC = "y5" | IOSTANDARD = LVTTL;
#NET "ramsn(2)" LOC = "w5" | IOSTANDARD = LVTTL;
#NET "ramsn(3)" LOC = "ab5" | IOSTANDARD = LVTTL;
#NET "ramsn(4)" LOC = "aa5" | IOSTANDARD = LVTTL;
#NET "read" LOC = "v12" | IOSTANDARD = LVTTL;
#NET "romsn(0)" LOC = "y4" | IOSTANDARD = LVTTL;
#NET "romsn(1)" LOC = "v7" | IOSTANDARD = LVTTL;
#NET "rwen(0)" LOC = "aa6" | IOSTANDARD = LVTTL;
#NET "rwen(1)" LOC = "y7" | IOSTANDARD = LVTTL;
#NET "rwen(2)" LOC = "y6" | IOSTANDARD = LVTTL;
#NET "rwen(3)" LOC = "w7" | IOSTANDARD = LVTTL;


NET "vid_b(0)" LOC = "l21" | IOSTANDARD = LVTTL;
NET "vid_b(1)" LOC = "k20" | IOSTANDARD = LVTTL;
NET "vid_b(2)" LOC = "k19" | IOSTANDARD = LVTTL;
NET "vid_b(3)" LOC = "l17" | IOSTANDARD = LVTTL;
NET "vid_b(4)" LOC = "l20" | IOSTANDARD = LVTTL;
NET "vid_b(5)" LOC = "k21" | IOSTANDARD = LVTTL;
NET "vid_b(6)" LOC = "l19" | IOSTANDARD = LVTTL;
NET "vid_b(7)" LOC = "l18" | IOSTANDARD = LVTTL;
NET "vid_g(0)" LOC = "p21" | IOSTANDARD = LVTTL;
NET "vid_g(1)" LOC = "r21" | IOSTANDARD = LVTTL;
NET "vid_g(2)" LOC = "m22" | IOSTANDARD = LVTTL;
NET "vid_g(3)" LOC = "p18" | IOSTANDARD = LVTTL;
NET "vid_g(4)" LOC = "n22" | IOSTANDARD = LVTTL;
NET "vid_g(5)" LOC = "p22" | IOSTANDARD = LVTTL;
NET "vid_g(6)" LOC = "r19" | IOSTANDARD = LVTTL;
NET "vid_g(7)" LOC = "p19" | IOSTANDARD = LVTTL;
NET "vid_r(0)" LOC = "n19" | IOSTANDARD = LVTTL;
NET "vid_r(1)" LOC = "n17" | IOSTANDARD = LVTTL;
NET "vid_r(2)" LOC = "m19" | IOSTANDARD = LVTTL;
NET "vid_r(3)" LOC = "m17"  | IOSTANDARD = LVTTL;
NET "vid_r(4)" LOC = "n18" | IOSTANDARD = LVTTL;
NET "vid_r(5)" LOC = "n20" | IOSTANDARD = LVTTL;
NET "vid_r(6)" LOC = "m20" | IOSTANDARD = LVTTL;
NET "vid_r(7)" LOC = "m18" | IOSTANDARD = LVTTL;
NET "vid_blankn" LOC = "n21" | IOSTANDARD = LVTTL;
NET "vid_clock" LOC = "aa12" | IOSTANDARD = LVTTL;
NET "vid_hsync" LOC = "t18" | IOSTANDARD = LVTTL;
NET "vid_vsync" LOC = "r18" | IOSTANDARD = LVTTL;
#NET "vid_sda" LOC = "a3" | IOSTANDARD = LVTTL;
#NET "vid_sdc" LOC = "a9" | IOSTANDARD = LVTTL;
#NET "vid_syncn" LOC = "f7" | IOSTANDARD = LVTTL;

#NET "wdogn" LOC = "l1" | IOSTANDARD = LVTTL;
#NET "writen" LOC = "aa3" | IOSTANDARD = LVTTL;

#NET "dsutx" LOC = "l4"  | IOSTANDARD = LVTTL ;#txd1
#NET "dsurx" LOC = "l3"  | IOSTANDARD = LVTTL ;#rxd1
#NET "dsuen" LOC = "d20"  | IOSTANDARD = LVTTL ;#switch(7)
#NET "dsubre" LOC = "d21"  | IOSTANDARD = LVTTL ;#switch(9)
NET "dsuact" LOC = "e11"  | IOSTANDARD = LVTTL ;#led(1)
#NET "errorn" LOC = "f11" | IOSTANDARD = LVTTL  ; #led(0)
#NET "pio(16)" LOC = "d11" | IOSTANDARD = LVTTL;  # led(2)
#NET "pio(17)" LOC = "c11" | IOSTANDARD = LVTTL;  # led(3)





CONFIG PROHIBIT  = "aa14"; #"fpgadata" 
CONFIG PROHIBIT  = "w12"; #"fpgainit"



