
	     TOPPERS/JSPJ[l [UY}jA 
    		    iMIPS3 ^[Qbgˑj

	   iRelease 1.4.1 ΉCŏIXV: 9-Aug-2004j

------------------------------------------------------------------------
 TOPPERS/JSP Kernel
     Toyohashi Open Platform for Embedded Real-Time Systems/
     Just Standard Profile Kernel

 Copyright (C) 2000-2004 by Embedded and Real-Time Systems Laboratory
                             Toyohashi Univ. of Technology, JAPAN
 Copyright (C) 2001-2004 by Industrial Technology Institute,
                             Miyagi Prefectural Government, JAPAN

 L쌠҂́CFree Software Foundation ɂČ\Ă
 GNU General Public License  Version 2 ɋLqĂC
 (1)`(4)̏𖞂ꍇɌC{\tgEFAi{\tgEF
 Aς̂܂ށDȉjgpEEρEĔzziȉC
 pƌĂԁj邱Ƃ𖳏ŋD
 (1) {\tgEFA\[XR[ȟ`ŗpꍇɂ́CL̒
     \C̗pщL̖ۏ؋K肪Ĉ܂܂̌`Ń\[
     XR[hɊ܂܂Ă邱ƁD
 (2) {\tgEFAėp\ȃoCiR[hiP[^uIu
     WFNgt@C⃉CuȂǁǰ`ŗpꍇɂ́Cp
     ɔhLgip҃}jAȂǁjɁCL̒쌠\C
     ̗pщL̖ۏ؋Kfڂ邱ƁD
 (3) {\tgEFAėps\ȃoCiR[ȟ`܂͋@ɑg
     ݍ񂾌`ŗpꍇɂ́Ĉꂩ̏𖞂ƁD
   (a) pɔhLgip҃}jAȂǁjɁCL̒
       \C̗pщL̖ۏ؋Kfڂ邱ƁD
   (b) p̌`ԂCʂɒ߂@ɂāCL쌠҂ɕ񍐂
       ƁD
 (4) {\tgEFA̗pɂ蒼ړI܂͊ԐړIɐ邢Ȃ鑹
     QCL쌠҂Ɛӂ邱ƁD

 {\tgEFÁCۏ؂Œ񋟂Ă̂łDL쌠҂́C
 {\tgEFAɊւāC̓Kp\܂߂āCȂۏ؂s
 ȂD܂C{\tgEFA̗pɂ蒼ړI܂͊ԐړIɐ
 Ȃ鑹QɊւĂC̐ӔC𕉂ȂD
------------------------------------------------------------------------

PDMIPS3 ^[Qbgˑ̊Tv

1.1 ^[QbgVXeƊJ

MIPS3vZbT̃^[QbgVXeƂẮAȉ̃vZbTT|[g
ĂB

EVR5500 (NEC)
EVR4131 (NEC)

T|[gĂ{[h́Aȉ̒ʂłB

EЃ}C_XE{ RTE-VR5500-CB(64) (CPU:VR5500)
Es}CNRs[^А KZ-Vr4131PCI-01 (CPU:VR4131)

Jɂ́AGCC Ȃǂ GNUJpAIuWFNgt@CtH[}b
g ELF WƂB

ȉAvr5500, vr4131fBNgmips3fBNg͈̔͂vZbT
ˑƌĂсAvr5500, vr4131fBNgɊւ邱ƂAVXeˑƌ
ԁB
	MIPS3^[Qbgˑ = vZbTˑ + VXeˑ

1.2 T|[g@\̊Tv

MIPS3^[Qbgˑ̋@\ƂāA݃}XN̕ύXEQ(chg_ipmAget_ipm)
ƁA\]pVXeQƋ@\(vxget_tim)T|[gĂB݂
֎~Ƌ(dis_intAena_int)̓T|[gĂȂB

1.3 ̃^[Qbgւ̃|[eBO

MIPS V[ÝAMIPS Ђ狟Ă CPU RAłÃRAp
lXȃvZbTe[J[oׂĂB܂AMIPS ɂ́A߃Zbg
̊gxɉ MIPS I ` IV ܂ł݂B̒ŁA MIPS III 
xiȉAMIPS3j̖߃ZbgpsB

͍svZbTɊւāAVR5500 ͖߃ZbgƂ MIPS IV 
܂őΉĂ邪AVR4131  MIPS III ܂ł̑Ήł邽߂łB
i̎pāAMIPSvZbTւ̃|[eBOsƂ\
  Bj

1.4 GDB X^u

݂ TOPPERS/JSP J[l MIPS3 łROMT|[gĂB

܂AGDBX^uƑgݍ킹Ďgp邱ƂlāA@łJSPJ[l
lɁA\[XR[hGDB_STUB}NɂRpC̐ݒsĂB
̃}N̐ݒɂAgp郊JXNvg؂ւ邱ƂŁAΉ
sĂB
(/vrxxxx/makefile.config)

MIPS3pGDBX^úAvr4131ΉłAĂATOPPERSvWF
Ngz[y[WAсA{錧YƋZpZ^[z[y[Wʂ
J\łB

1.5 VA|[g

J[l̃Oo͗pɃVA|[gPgpB
VA|[g̐ݒ
  E8rbg
  EpeBȂ
  EXgbvrbgF1rbg
  E{[[gF9600bps
łB
(tl16pir552.c, vr4131_dsiu.cGsiopinib_tablez)

ȂA{[[gɂẮADEVIDE_RATIO}NɂĒ`Ă̂ŕKv
ĕύX邱ƂłB
(sys_config.h)

QDMIPS3^[Qbgˑ̋@\

̐߂ł́AJ[lуVXeT[rX̋@\̒ŁAMIPS3^[Qbg
̕ɂĉB

2.1 f[^^

int^ unsigned int^̃TCY 32rbgłB
݂́AMIPŜ́A64rbgA[LeN`ł邽߁A64rbgւ̑Ή
\łBAiKł̗pтȂǂA32rbgł̎
sB

2.2 ݊Ǘ@\CPUO

MIPS3ł́A݂CPUOꏏɂAuOvƂ`ŁAs
B̂߁AǗEZbgȂǂ̈ꕔ̒vIȗOAxN
^AhX͋ʂƂȂĂB

iȂA̎ł́AROMȂǂ̗RɂAXe[^XWX^BEVrb
gPƂĎsĂ̂ŁAxN^AhX0xbfc00300ɂȂĂBj
(sys_config.h ; INIT_SR)

ŁAxN^AhXɔ񂾓rA݂CPUO(݈ȊÓu
OvAȉÂ悤ɌĂԂƂƂB)Ƃɕ򂳂ďsKv
BŁAWX^(Cause;CP0)̗OR[h(ExcCode)pĔf
sĕ򂵂ĂB

f́AevɑΉnhĂяo߂ɁA[xN^e[u
݂ĂB
      E		INT_TABLE int_table[ TMAX_ALL_INTNO ]
			ICU_IPM icu_intmask_table[ TMAX_ALL_INTNO ]
      ECPUO		EXCVE exc_table[ TMAX_CORE_EXCNO ]
ŁA݃nh[xN^e[uɂẮAMIPS3RÁA݂
DxsȂ߂ɁA݃nhĂяoMIPS3RAɊւ銄
݃}XNƂ܂Ƃ߂INT_TABLE^`Až^ƂB܂A
Rg[ɂẮAlXȊ݃Rg[݂邱ƂlāA
ڐÅϓ_vZbTˑ番āAVXeˑɂĊ
݃Rg[֘A̎sKv邽߁Aʂicu_intmask_tablez
`邱ƂőΉ邱ƂƂB
icpu_config.h, cpu_config.c, pic_icu.h, vr4131_icu.hj

ȂAŁA
	TMAX_ALL_INTNO : MIPS3RAƊ݃Rg[Ƃ܂߂A
			 ̑{
		iMIPS3RA ̑{ TMAX_CORE_INTNO (8{Œ)ƁA
		  Rg[Ǘ̑{ TMAX_ICU_INTNO Ƃ̍vB)
	TMAX_CORE_EXCNO : MIPS3RAǗ́ACPUȎ{i32{Œj
łB
(mips3.h, cpu_config.h, pic_icu.h, vr4131_icu.h)

nh[xN^e[uɂ́AlƂāAfobNpcpu_experr֐
o^ĂB́AƂāA݁ECPUOETLB, XTLBsv
̃X^bN|C^̒lAXe[^XWX^̒lAWX^̒l
֐łA̒lOo͗p̃|[gɏo֐łB
(cpu_config.c)

ȉł́A2.3`2.4ł݂͊ɂĐA2.5łCPUOɂĐ
B

iMIPS3RÁA݃Rg[ĂȂ߁Ae^[Qbgɂ
ĊݏقȂBŁA񗘗p^[QbgȊOɈڐA邽߂
ݏɊւC^tF[X́A̍̕Ōɂ܂Ƃ߂ċLڂ
̂ŁAQƂ̂ƁBj

2.3 ݊Ǘ@\

2.3.1 ݃Rg[ICUCPUƂ̐ڑ

MIPS3RÁA݃Rg[ĂȂ߁Aʂɐ݂KvB
̊݃Rg[Ƃ̐ڑ󋵂Ƃ`邽߂ɁAINIT_CORE_IPM 
`B̒ĺAmips3.hŒ`ĂCause_Int(0:4)}N𗘗pĒ`
B
(ȂÃ}ŃAŏIIɂCP0̌WX^̃rbg𒼐ڒ`ĂB)
(sys_config.h)

(a) VR5500
VR5500́A݃Rg[ĂȂ߂ɁA^[Qbg{[h
݃Rg[݂ĂB̊݃Rg[Ƃ́AO
Int(0:1)̂Q{ŐڑĂB
      INIT_CORE_IPM = ( Cause_Int0 | Cause_Int0 )

(b) VR4131
VR4131́A݃Rg[ĂB̊݃Rg[Ƃ́A
OInt(0:2)̂R{ŐڑĂB
in[hEFAp196QƁj
      INIT_CORE_IPM = ( Cause_Int0 | Cause_Int1 | Cause_Int2 )

2.3.2 ݃nh

݃nh́AL̋[xN^e[uɓo^ėp邱ƂɂȂB
̂Ƃ́Ae[u߂̈łԍuݗvԍvƌĂԁB

0 ` 7́AMIPS3RÅeݗvɑΉĂAʕɂ INTNO_IP0
 ` INTNO_IP7 ƂĒ`ĂB
(mips3.h)

܂A8Ԉȍ~AVXeˑňȉ̂悤ɒ`ĂB

(a) VR5500
          ݗv    b  ݗvԍ  b    }N
      ||||||||||||||||||||||||||||
          ^C}O      b        W        b  INTNO_TIMER0
      ||||||||||||||||||||||||||||
          VAO    b        X        b  INTNO_SERIAL0
      ||||||||||||||||||||||||||||
          GBUS-INT0-    b      PO        b  INTNO_GBUS
      ||||||||||||||||||||||||||||
          BUS ERROR     b      PP        b  INTNO_BUS_ERR
      ||||||||||||||||||||||||||||
          ^C}P      b      PQ        b  INTNO_TIMER1
      ||||||||||||||||||||||||||||
          VAP    b      PR        b  INTNO_SERIAL1
      ||||||||||||||||||||||||||||
          p      b      PS        b  INTNO_PARALEL
      ||||||||||||||||||||||||||||
          DMAC INTREQ-  b      PT        b  INTNO_DMAC

(pic_icu.h)

(b) VR4131
          ݗv        b  ݗvԍ  b    }N
      ||||||||||||||||||||||||||||||
        obe            b        W        b  INTNO_BAT
      ||||||||||||||||||||||||||||||
        p[XCb`      b        X        b  INTNO_POWER
      ||||||||||||||||||||||||||||||
        qsbkP    b      PO        b  INTNO_RTCL1
      ||||||||||||||||||||||||||||||
        ElipsedTime ^C}  b      PP        b  INTNO_ETIME
      ||||||||||||||||||||||||||||||
        fht              b      PQ        b  INTNO_GIU
      ||||||||||||||||||||||||||||||
        rht              b      PR        b  INTNO_SIU
      ||||||||||||||||||||||||||||||
        \tgEFA        b      PS        b  INTNO_SOFTINT
      ||||||||||||||||||||||||||||||
        bkjqtm        b      PT        b  INTNO_CLKRUN
      ||||||||||||||||||||||||||||||
        qsbkQ    b      PU        b  INTNO_RTCL2
      ||||||||||||||||||||||||||||||
        kdc              b      PV        b  INTNO_LED
      ||||||||||||||||||||||||||||||
        TClockJE^      b      PW        b  INTNO_TCLK
      ||||||||||||||||||||||||||||||
        ehq              b      PX        b  INTNO_FIR
      ||||||||||||||||||||||||||||||
        crht            b      QO        b  INTNO_DSIU
      ||||||||||||||||||||||||||||||
        obh              b      QP        b  INTNO_PCI
      ||||||||||||||||||||||||||||||
        rbt              b      QQ        b  INTNO_SCU
      ||||||||||||||||||||||||||||||
        brh              b      QR        b  INTNO_CSI
      ||||||||||||||||||||||||||||||
        abt              b      QS        b  INTNO_BCU

(vr4131_icu.h)

̃^[QbgɂẮAJ[lł́Aȏ̊ݗv̒牺L
pĂB

(a) VR5500
  ^C}OAVAOiAVAPj

(b) VR4131
  TClockJE^Acrht

2.3.3 ݃}XN^ݗDx

݃}XN^ݗDx̂߂́A`EAPI͈ȉ̒ʂłB

(1)IPM^
CPURAƊ݃Rg[ƂSĂ܂Ƃ߂A݃}XN߂̌^
BCORE_IPM^coreICU_IPM^icuƂȂ\̂ƂĒ`ĂB
(cpu_defs.h)

CORE_IPM^́AXe[^XWX^ɏޒlێ邽߁AUINT^ƂĒ
`ĂB܂AICU_IPM^́AꂼɃ^[Qbg{[hɂĉL
悤ɒ`ĂB

(a) VR5500
  VR5500͊݃Rg[ĂȂ߁A^[Qbg{[hɊ
  ݃Rg[ĂB̊݃Rg[́APoCg~Q
  ̊݃}XNĂ̂ŁAICU_IPM^
	{ int0m, int1m } = { UB^, UB^ }
  ƂĒ`ĂB

(b) VR4131
  VR4131͊݃Rg[ĂB̓݃Rg[́A
  QoCg~Q̊݃}XN(MSYSINT1REG, MSYSINTREG2REGWX^)
  Ă̂ŁAICU_IPM^
	{ msysint1, msysint2 } = { UH^, UH^ }
  ƂĒ`ĂB

(cpu_defs.h, sys_defs.h)

̎ł́AICU_IPM ^̏lƂĉL̂悤ɂĂB

(a) VR5500
  ^C}Ô݂ĂB

(b) VR4131
  obê݂ĂB

(sys_config.h)

icore̒ĺAXe[^XWX^ɏށAIM(0:7)݂̂̕ێ
  ƁB̃rbg삵ꍇ̓́Aۏ؂ȂBj

(2)all_set_ilv          	݃x̐ݒ

yCAPIz
        all_set_ilv(INTNO intno, IPM *ipm)

yp[^z
	INTNO intno		ݗvԍ
	IPM ipm			݃}XN

y^[p[^z
	Ȃ

y@\z
MIPS3RAъ荞݃Rg[ɊւA݃nh[xN^e[
uiint_tableȂтɁAicu_intmask_tablejɁA݃}XNݒ肷B
(cpu_config.h)

ȂA^[Qbg{[h̊݃Rg[ɂ邪As
^[Qbg{[h̊݃Rg[ł͗ƂݗDxs
ȂB̂߂ɁAݗDx݃}XN̐ݒōsKvB

̎A݃}XNݒ肷Ƃ́AIPM^\̗̂vfłCORE_IPM^
coréÃ^[Qbg{[h̃n[hEFA\𔽉fĂ̂ł
ŁAƂĕύXȂƂƂB݃x̐ݒ́AڑĂ
݃Rg[̊݃}XNύX邱ƂőΉ邱ƂƂB

̎ɂADx͈ȉ̒ʂłB
(a) VR5500
  Dx : () VAP -> VAO -> ^C}O ()
(rte-vr5500-cb.h)
(b) VR4131
  Dx : () crht -> TClockJE^ -> obecʕsm ()
(kz-vr4131pci-01.h)

2.4 chg_ipm̃T|[gɂ

chg_ipm T|[g邽߂ɁA݃nh̏oȂǂɃI[owb
h𐶂ĂBŁASUPPORT_CHG_IPM Ƃ}NɂÃT[
rXR[T|[g邩ǂ؂ւ悤ɂĂB
(SUPPORT_CHG_IPM ́Acpu_config.h ̒ #define ĂB)

MIPS3^[Qbgˑ̊݃}XN̕ύXEQƂ̂߂̃T[rXR[̎dl
͎̒ʂB

(1) chg_ipm			݃}XN̕ύX

yCAPIz
	ER ercd = chg_ipm(IPM ipm);

yp[^z
	IPM	ipm		ݒ肷ׂ IPM ̒l

y^[p[^z
	ER	ercd		G[R[h

yG[R[hz
	E_CTX		ReLXgG[
	E_PAR		p[^G[(ipm s)

y@\z

݃}XN ipm Ŏw肳ꂽlɐݒ肷Bw肵lAMIPS3RA
ɂĂ0`MAX_IPM͈͓̔ɁA݃Rg[ɂĂ͊
Rg[̊݃}XN͈͓̔ɓĂȂꍇɁAE_PARG[
B܂Aݒ肵IPM̒ĺAfBXpb`pB
ŁAMAX_IPḾAMIPS3RAɐݒł銄݃}XN̍ő̃rbgp^[
łB

̃T[rXR[́A^XNReLXg CPUbNԂ̎̂݌
яoƂłB^XNReLXg CPUbNԂŌĂяo
ɂ́AE_CTXG[ƂȂB

(2) get_ipm			݃}XN̎Q

yCAPIz
	ER ercd = get_ipm(IPM *p_ipm);

yp[^z
	Ȃ

y^[p[^z
	ER	ercd		G[R[h
	IPM	ipm		݂ IPM ̒l

yG[R[hz
	E_CTX		ReLXgG[

y@\z

݂ ݃}XN̒lǂݏoAipm ɕԂB

̃T[rXR[́A^XNReLXg CPUbNԂ̎̂݌
яoƂłB^XNReLXg CPUbNԂŌĂяo
ɂ́AE_CTXG[ƂȂB

ȂAg[XO@\ɊւāAchg_ipmɊւ镔̓VXeˑɂ
`sĂB
(sys_tool_config.h)

2.5 CPUOǗ@\CPUOnh

DEF_EXC Ŏw肷CPUOvԍ(excno)́AMIPS3 ł̋[xN^e[u
̃xN^ԍ\Ãf[^^(EXCNO) UINT^ɒ`ĂBO
vԍMIPS3̗OR[h11ɑΉĂB

DEF_EXC ŁAOvԍƂėLłȂlACPUOɑΉȂԍ
w肵ꍇ͕̓ۏ؂ȂB

(1)p_excinf
CPUOnhɓnp_excinf́ACPUÕReLXgۑ
X^bNւ̃|C^nBX^bN̍\ȉɎB

      ----------------------
     |       sp (r29)       |  <-- p_excinf
      ----------------------
     |       at (r1)        |
      ----------------------
     |       v0 (r2)        |
      ----------------------
     |       v1 (r3)        |
      ----------------------
     |       a0 (r4)        |
      ----------------------
     |       a1 (r5)        |
      ----------------------
     |       a2 (r6)        |
      ----------------------
     |       a3 (r7)        |
      ----------------------
     |       t0 (r8)        |
      ----------------------
     |       t1 (r9)        |
      ----------------------
     |       t2 (r10)       |
      ----------------------
     |       t3 (r11)       |
      ----------------------
     |       t4 (r12)       |
      ----------------------
     |       t5 (r13)       |
      ----------------------
     |       t6 (r14)       |
      ----------------------
     |       t7 (r15)       |
      ----------------------
     |       t8 (r24)       |
      ----------------------
     |       t9 (r25)       |
      ----------------------
     |       gp (r28)       |
      ----------------------
     |       fp (r30)       |
      ----------------------
     |       ra (r31)       |
      ----------------------
     |  PC (EPC;CP0_r14)    |
      ----------------------
     |  SR (Status;CP0_r12) |
      ----------------------
     |          HI          |
      ----------------------
     |          LO          |
      ----------------------

     sp : Stack Pointer
     gp : Global Pointer
     fp : Frame Pointer
     ra : Return Address
     PC : Program Counter
     SR : Status Register

܂ACPUOEPC̒ĺAO߂Xbgɂꍇ́A
O̕EWv߂B
iȂ킿AΏۖ߂̃AhX-4܂Bj

2.6 HI, LO WX^

MIPS3ł́A揜ZWX^HI, LOT|[gĂBŁA̎ɂ
ẮA݃nh̏oŁAX^bN֕ۑĂB
^XNReLXgł́ÃfBXpb`Ăяȍꍇ́A֐Ăяo
łǍĂяo܂ẴWX^𗘗p邱Ƃ͖̂ŁA
ۑĂȂB
(cpu_support.S)

2.7 X^[gAbvW[

MIPS3^[Qbgł́AOxN^̈ɁAZbgт NMI(Non Maskable
Interrupt)p̃xN^AhXĂB̃AhX̃Wv悪
X^[gAbvW[ƂȂĂB

̃X^[gAbvW[(reset.S)ł́ȀsB

(A) vZbT̏

vZbT̏́AL̂̂sB
(a) CPUWX^̏
揜ZWX^AX^bN|C^spAO[o|C^gpAk0WX^
B

X^bN|C^ɂ́AAhX _stack_top ݒ肷B_stack_top ́AJ
XNvgŒ`̂ƂBŐݒ肳X^bN̈́A^XN
ReLXgp̃X^bN̈ƂāA݃nhȂǂŗpB
(vrxxxxelf.ld)

O[o|C^ɂ́AAhX _gp ݒ肷B_gp ́AJXNvg
Œ`̂ƂB
(vrxxxxelf.ld)

k0WX^ɂ́AJ[lN͔^XNReLXgł̎sƂ̂ŁA1
ݒ肷B

(b) CP0WX^̏
Xe[^XWX^ARtBOWX^AEHb`LoWX^ArWX^
B

Xe[^XWX^ INIT_SR ɏBINIT_SR ́Asys_config.h Œ`
邱Ƃz肵ĂB̂ƂAXe[^XWX^̊݃}XNݒ
B̎A荞݃}XN INIT_CORE_IPM (sys_config.h) ̒lɐݒ肷B

RtBOWX^AINIT_CONFIG_MASK ŏBINIT_CONFIG_MASK ́A
sys_config.h Œ`邱Ƃz肵ĂB̃}XNlORZsƂŁA
sĂB

(B) hardware_init_hook ̌ďo

hardware_init_hook  0 łȂꍇɂ́Ahardware_init_hook ĂяoB
hardware_init_hook ́AʂɃJ[lNOɍsKvVXe
ˑ̏iFRAMRg[̏ȂǁjLq̂ƂB
Lqꏊ́Asys_support.S WƂB

hardware_init_hook ǂł`ĂȂꍇAJł̃V{0
ɒ`(JXNvgɋLq)B

ȂAMIPS3A[LeN`ł́AʂɈꎟLbVTLB (Translation
Lookaside BufferGϊɏՋ@\)Ă邪AvZbTƂɑ
ႢBŁȀ́Ahardware_init_hook ɋLq邱Ƃ
WƂB

(C) bssZNVdataZNV̏

bssZNVi sbssZNVj[NAB

dataZNVi sdataZNVjBROMΉ̂߂ɁAROM
 RAM ւƁARs[sB

(D) software_init_hook ̌ďo

software_init_hook  0 łȂꍇɂ́Asoftware_init_hook ĂяoB
software_init_hook ́AJ[lNOɍsKv\tgEFA
(̓Iɂ́ACu)ˑ̏s߂ɗpӂĂB

software_init_hook ǂł`ĂȂꍇAJł̃V{
 0 ɒ`(JXNvgɋLq)B

(E) J[l̋N

kernel_start ֕򂵁AJ[lNBkernel_start 烊^[
邱Ƃ͑z肵ĂȂB

(reset.S)

RDVXeˑ̋@\

3.1 VXeNbNhCo

VXeNbNhCo isig_tim ĂяóAsys_defs.h 
TIC_NUME  TIC_DENO Œ`Ă(ftHgł 1~b)B̒
`ύX邱ƂŁAisig_tim ĂяoύX邱ƂłBA
^C}̐xNbNɈˑ邽߁A^C}̋NbNPʂŒ[
Ȃlݒ肵ꍇɂ́Aisig_tim ̌ďoɌ덷邱ƂɂȂB

ftHgł́AL̃^C}𗘗pĂB
(a) VR5500
  ^[Qbg{[hڂ̃^C}(uPD71054)̃^C}0 (NbN 2MHz)
(b) VR4131
  VR4131RTCTClockJE^ (NbN 33.2MHz)

ȂAMIPS3RÃ^C}́A[U[p邱ƂłB

3.2 \]pVXeQƋ@\

MIPS3^[Qbgˑł́A\]pVXeQƋ@\(vxget_tim)T
|[gĂBSYSUTIM^UD^(64rbg̕^)Œ`ĂB

\]pVXe̐x͋NbNPʂł邪A^C}̌ݒl
ǂݏo߂ɈꎞIɃ^C}~Kv邽߁Avxget_tim Ă
xɃVXeNbNÂx邱ƂɂȂBŁASUPPORT_VXGET_TIM
Ƃ}NɂÃT[rXR[T|[g邩ǂ؂
悤ɂĂB
(SUPPORT_VXGET_TIM ́Asys_config.h ̒ #define ĂB)

3.3 VAC^tF[XhCo

(a) VR5500
VAC^tF[XhCóA{[h㓋ڂSCCiSerial Communication
Controlerj(TL16PIR552)UART-CH#0AUART-CH#1T|[gĂBVA
̃T|[g|[ǵATNUM_PORT}NɂĒ`BftHgł́A
|[gPƃ|[gQ̂Q|[gT|[gĂBȂAJ[l̃Oo͗p
ɂ̓|[gPɎgpĂB
(TNUM_PORT ́Asys_config.h ̒ #define ĂB)
(tl16pir552.h, tl16pir552.c)

(b) VR4131
VAC^tF[XhCóAVR4131DSIU(fBoOVAC^
tF[Xjbg)T|[gĂB́AJ[l̃Oo͗pɎgp
ĂB

ȂASCU(VAC^tF[Xjbg)́AT|[gĂȂBA
DSIUp̃\[XR[hύX邱ƂɂAΉ\łB

(vr4131_dsiu.h, vr4131_dsiu.c)

3.4 }bv

}bvɊւݒ́AJXNvgɂčsBRpCɗp
郊JXNvgɂẮAMakefile.config ɂĐݒsB
(vrxxxxelf.ld, Makefile.config)

ȂAR[ḧ悪 0xbfc00000 `ƁA0x9fc00000 `̂Q\ɂȂĂA
ɁAX^[gAhXA0x00000000 łȂ߂ɁAROMɏĂt
ƂAROMAhXƂ̑ΉȂB̂߂ɁApROMC^ŁA
K؂ȃItZbgl̐ݒAсAK؂ȃobt@NA̐ݒsKv
B

(a) VR5500
EЃ}C_XE{RTE-VR5500-CB(64)(CPU: VR5500)

̎ɂẮAR[ḧύX`ɂAkseg0 ܂ kseg1 
̗̓\łBύX́AJXNvgōsB

eX̃}bv͈ȉʂłB

Ekseg0̈iLbV̈j̏ꍇ
         0x9fc00000 - 0x9fdfffff  R[ḧ		(FLASH ROM 2Mbyte)
	(0xa0000000 - 0xa00fffff  ROM̈̃~[pɊm
							(SRAM   1Mbyte))
         0xa8000000 - 0xabffffff  f[^̈		(DRAM  64Mbyte)
		    - 0xabffffff  ^XNReLXgpX^bN
	 0xbfc00000 - 0xbfc007ff  OxN^e[uË
				  (exce_vec_map, reset ZNVŎgp)
(vr5500elf.ld)

Ekseg1̈iLbV̈j̏ꍇ
	(0xa0000000 - 0xa00fffff  ROM̈̃~[pɊm
							(SRAM   1Mbyte))
         0xa8000000 - 0xabffffff  f[^̈		(DRAM  64Mbyte)
		    - 0xabffffff  ^XNReLXgpX^bN
         0xbfc00000 - 0xbfcfffff  R[ḧ		(ROM    1Mbyte)
(vr5500elf.ld)

(b) VR4131
Es}CNRs[^А KZ-Vr4131PCI-01 (CPU:VR4131)

̎ɂẮAR[ḧύX`ɂAkseg0 ܂ kseg1 
̗̓\łBύX́AJXNvgōsB

eX̃}bv͈ȉʂłB

Ekseg0̈iLbV̈j̏ꍇ
         0x9c000000 - 0x9c03ffff  ^XNReLXgpX^bN
							(SRAM 256kbyte)
         0x9fc00700 - 0x9fdfffff  R[ḧ	   (FLASH ROM 2Mbyte)
	(0xa0000000 - 0xa01fffff  ROM̈̃~[pɊm
							(DRAM   2Mbyte))
         0xa0200000 - 0xa0ffffff  f[^̈		(DRAM  14Mbyte)
	 0xbfc00000 - 0xbfc006ff  OxN^e[uË
						  (FLASH ROM 0x700byte)
				 (exce_vec_map, reset ZNVŎgp)
(vr4131elf.ld)

Ekseg1̈iLbV̈j̏ꍇ
	(0xa0000000 - 0xa01fffff  ROM̈̃~[pɊm
							(DRAM   2Mbyte))
         0xa0200000 - 0xa0ffffff  f[^̈		(DRAM  14Mbyte)
         0xac000000 - 0xac03ffff  ^XNReLXgpX^bN
							(SRAM 256kbyte)
         0xbfc00000 - 0xbfdfffff  R[ḧ		(FLASH ROM 2Mbyte)
(vr4131elf.ld ɕύX邱ƂőΉ\)

3.5 CP0nU[hɂ

MIPSł́AvZbTɂĂCP0nU[ĥ݂B̂߂
ΉƂāANOP_FOR_CP0_HAZARD}N`B́Acpu_support.S
pĂB

`@́AKvȐnopׂ邱ƂɂȂB
(vr4131.h, vr5500.h)

SDJ̍\z

J̍\z@ɂẮAGNUJ\z}jAQƂ邱ƁB
ȂA^[Qbg <TARGET> ̒lɂẮAȉQl̂ƁB
JɂWindows2000SP4CygwinpB

mF́AL̃c[ɂĊmFĂB̃c[ftHgƂB

EGNUzzĂIWiGCCȂǂ\[X\zc[
  mFsƂ̃o[W͈ȉ̒ʂłB
    BINUTILS : 2.13.2.1
    GCC-CORE : 3.3.2
    NEWLIB   : 1.11.0
ȉꍇ̃^[Qbg <TARGET> ɂ́Amipsel-nec-elf pBj

TD

ErbOGfBA̓T|[gĂȂB
  igGfBÂ݂T|[gĂBj
(sys_defs.h)

E64bit[h̓T|[gĂȂB

EVR5500_jbg̓T|[gĂȂB

EX^[gAbv[`ANXNvǵAC++ɑΉĂȂB

UD̑

6.1 fBNgEt@C\

MIPS3 ^[Qbgˑ̊et@C̊Tv͎̒ʂB

    config/mips3/
        MIPS3ʕ

	Makefile.config		MakefileMIPS3^[Qbgˑ̒`
	cpu_defs.h		vZbTˑ̃AvP[Vp`
	cpu_config.h		vZbTˑ̍\`
	cpu_config.c		vZbTˑ̊֐
	cpu_support.S		vZbTˑ̃Tu[`
	cpu_context.h		ReLXg
	cpu_rename.def		J[l̓ʖ̃l[`
	cpu_rename.h		J[l̓ʖ̃l[
	cpu_unrename.h		J[l̓ʖ̃l[
	tool_defs.h		Jˑ̃AvP[Vp`
				iGNUJpj
	tool_config.h		Jˑ̍\`iGNUJpj
	makeoffset.c		offset.h T|[gvO
	cpu_insn.h		჌x̃vZbT샋[`
	exception_vector.S	OxN^AhXł̕򏈗
	start.S			X^[gAbvW[
	mips3.h			MIPS3̃WX^Ȃǂ̒`
	util.h			rbgԍȂǂ̒`

    config/mips3/vr5500/
        VR5500(NEC)ΉVXeˑ
       (Ѓ}C_XE{ RTE-VR5500-CB(64) Ή)

	Makefile.config		MakefileRTE-VR5500-CB(64)VXeˑ`
	sys_defs.h		VXeˑ̃AvP[Vp`
	sys_config.h		VXeˑ̍\`
	sys_config.c		VXeˑ̊֐
	sys_support.S		VXeˑ̃Tu[`
	sys_rename.def		J[l̓ʖ̃l[`
	sys_rename.h		J[l̓ʖ̃l[
	sys_unrename.h		J[l̓ʖ̃l[
	sys_tool_config.h	Jˑ̃VXeˑ\`
				iGNUJpj
	hw_timer.h		^C}샋[`
	hw_serial.h		SIOhCo
	hw_serial.cfg		SIOhCõRtBM[Vt@C
	vr5500.h   		VR5500̃n[hEFA`
	pic_icu.h		݃Rg[֌W̒`
        rte_vr5500_cb.h 	RTE-VR5500-CB(64){[h̃n[hEFA`
	upd71054.h		NECЃPD71054p ^C}hCo֘A̒`
				(^[Qbg{[hRTE-VR5500-CBڂ̃^C})
	vr5500_elf.ld		JXNvg(ROM p)
	vr5500_elf_ram.ld	JXNvg(RAM ]p)

    config/mips3/vr4131/
        VR4131(NEC)ΉVXeˑ
       (s}CNRs[^А KZ-Vr4131PCI-01 Ή)

	Makefile.config		MakefileKZ-Vr4131PCI-01VXeˑ`
	sys_defs.h		VXeˑ̃AvP[Vp`
	sys_config.h		VXeˑ̍\`
	sys_config.c		VXeˑ̊֐
	sys_support.S		VXeˑ̃Tu[`
	sys_rename.def		J[l̓ʖ̃l[`
	sys_rename.h		J[l̓ʖ̃l[
	sys_unrename.h		J[l̓ʖ̃l[
	sys_tool_config.h	Jˑ̃VXeˑ\`
				iGNUJpj
	hw_timer.h		^C}샋[`
	hw_serial.h		SIOhCo
	hw_serial.cfg		SIOhCõRtBM[Vt@C
	vr4131.h		VR4131̃n[hEFA`
	vr4131_sil.h		VR4131̃n[hEFAANZXpVXe
				C^tF[XC[`
	vr4131_icu.h		VR4131݃Rg[jbgICUp
				݊֘A̒`
	vr4131_dsiu.h		VR4131fBoOVAC^tF[Xjbg
				DSICp ȈSIOhCo֘A̒`
	vr4131_dsiu.c		VR4131fBoOVAC^tF[Xjbg
				DSICp ȈSIOhCo
	vr4131_rtc.h		VR4131A^CNbNjbgRTCp
				^C}hCo֘A̒`
        kz_vr4131pci_01.h	KZ-Vr4131PCI-01{[h̃n[hEFA`
	vr4131_elf.ld		JXNvg(ROM p)
	vr4131_elf_gdb.ld	JXNvg(GDB X^up)

iȉAVR5500ڃ^[Qbg{[hRTE-VR5500-CBj
    pdic/simple_sio
	tl16pir552.h		TITL16PIR552p ȈSIOhCo֘A̒`
	tl16pir552.c		TITL16PIR552p ȈSIOhCo
				(^[Qbg{[hRTE-VR5500-CBڂ̃VA
				 Rg[)

6.2 ̑

MIPS A[LeN`̗pvZbT̎ނ́AɑłB̒ŁA
XJґ̃^[Qbg̖肩A̎ VR4131AVR5500 Ƃ
̃vZbT݂̂̃T|[gƂȂĂ܂B

ŁÁAɑɓnĂvZbT̓eXgɋ͂
WĂ܂B

ALւƂAB҂Ă܂B

TOPPERSvWFNg  [OXg  TOPPERS-USER

{錧YƋZpZ^[  @BdqZp  ZpJ
  TEL : 022-377-8700Ae-mail : micom@mit.pref.miyagi.jp


VDJ[lڐA҂ւ̏

́AMIPSA[LeN`ւ̎As^[Qbg
vZbTȊOMIPSA[LeN`vZbTւƈڐA邽߂̏ɂ
܂Ƃ߂B

7.1 ݃Rg[ICUCPUƂ̃C^tF[Xɂ

MIPS3ʕł́A݂CPUO܂ł͍̕sA܂ACPUOɂ鏈
͍sBAݗvɑ΂镪͍sȂB́AMIPS3ɐڑ
銄݃Rg[łȂƂƁȂlɑ傫
łB
(cpu_support.S)

ŁAȉɁÂ̕߂̃C^tF[XȂтɁȂ̂Ƃ
쐬Ȃ΂ȂȂ}NȂǂ܂Ƃ߂B
(cpu_support.S ; proc_interruptȉ)

Eݗvʊ֌W

(1)ݗvԍ
ݗv𔻒fɁA݃nhĂяo߂̈ƂȂԍB
0 ` 7́AMIPS3ʕɂ INTNO_IP0 ` INTNO_IP7 ƂĒ`ĂB
(mips3.h)
ŁAVXeˑł́A8Ԉȍ~`B

(2)PUSH_ICU_IPM                 ݃Rg[̊݃}XN̑Ҕ

y@\z
݃Rg[̊݃}XNAX^bN֕ۑB
AZuŏ}NƂĒ`Acpu_support.SŎgpB
OɊ݃Rg[𗘗pȂVXeł́AŒ`邱ƁB

(3)POP_ICU_IPM                  ݃Rg[̊݃}XN̕

y@\z
݃Rg[̊݃}XNAX^bN畜B
AZuŏ}NƂĒ`Acpu_support.SŎgpB
OɊ݃Rg[𗘗pȂVXeł́AŒ`邱ƁB

(4)PROC_INTERRUPT_SYS ܂ proc_interrupt_sys
				ݗvɑ΂enhւ̕򏈗

y@\z
ݗv𔻒fAK؂Ȋ݃nhĂяoB
@́A}NiPROC_INTERRUPT_SYSj܂́A֐ďoiproc_interrupt_sysj
ōsƂƂB
̓Iɂ́Aȉ̂悤ȃvZXŎ邱ƂɂȂB
	1. ݗv̔
	2. ݃}XNiRAA݃Rg[j̐ݒ
	3. ݋
	4. bꃋ[`̌ďo
	5. ݋֎~
	6. ݃Rg[̊ݗṽNA
       (7. join_interrupt_and_exceptionɖ߂B; ֐ďȍꍇ)
ďöƂẮAa1WX^ɂ͊ݗṽXe[^XWX^̒l
A܂Aa2WX^ɂ͌WX^̒lĂ̂ŁA
p邱ƂłB

ylz
EɂẮAraWX^͔j󂵂Ă͂ȂȂB
EsxȂǂ̊ϓ_A}N`D悷B
Eڂ́ALu7.2 ݃nȟďo̎vQƁB

E݃}XN^ݗD搧֌W

(1)ICU_IPM^
݃Rg[ɂẮA݃}XN߂̌^łB

(2)CHECK_ICU_IPM                ICŮ݃}XNIPM̃`FbN[`

yCAPIz
	CHECK_ICU_IPM(ICU_IPM p);

yp[^z
	ICU_IPM	p		`FbNׂ ICU_IPM ̒l

y@\z
݃}XN p Az肳Ă͈͂ɂ邩ǂ`FbNB
CŗpA}NƂĒ`BCHECK_IPM ĂяoB
(pic_icu.h, vr4131_icu.h)

(3)icu_set_ipm                  荞݃Rg[̃}XNݒ

yCAPIz
	icu_set_ipm(ICU_IPM *icu_ipm);

yp[^z
	ICU_IPM	icu_ipm		ݒ肷ׂ ICU_IPM ̒l

y^[p[^z
	Ȃ

y@\z
݃Rg[̊݃}XNAicu_ipmɐݒ肷B
(pic_icu.h, vr4131_icu.h)

(4)icu_get_ipm                  荞݃Rg[̊݃}XN擾

yCAPIz
	icu_get_ipm(ICU_IPM *icu_ipm);

yp[^z
	Ȃ

y^[p[^z
	ICU_IPM	icu_ipm		݂ ICU_IPM ̒l

y@\z
݃Rg[̊݃}XN擾Aicu_ipm֕ۑB
(pic_icu.h, vr4131_icu.h)

(5)icu_set_ilv			݃Rg[̊݃}XNe[u
				̐ݒ

yCAPIz
	icu_set_ilv(INTNO intno, ICU_IPM *icu_ipm);

yp[^z
        INTNO   intno           ݃}XNe[ũCfbNX
	ICU_IPM	icu_ipm		ݒ肷銄݃}XN̒l

y@\z
݃Rg[̊݃}XNe[úAintnoԂɊ݃}XNicu_ipm
ݒ肷Ball_set_ilvĂяoB
(pic_icu.h, vr4131_icu.h)

7.2 ݃nȟďo̎

LC^tF[XɊÂAPROC_INTERRUPT_SYS܂proc_interrupt_sys
̎ɂĐB

ȂA̎ɂẮAƂVR5500łproc_interrupt_sys֐
AVR4131łPROC_INTERRUPT_SYS}N`ĂB
(sys_support.S:VR5500, vr4131_icu.h:VR4131)

̎ɂẮA^[Qbg{[h̊݃Rg[̎dl𓥂܂A
኱̔ėp`ŎsĂB

X̏ɂăRgĂB

  1. ݗv̔

  ݗv̔ʂ́A
        PDMIPS3RACauseWX^ɊÂ
        QD݃Rg[ɊÂ
  2iKł̕򔻒fsĂB̂A݃Rg[ɂ
  ͎̕኱̔ėp邽߂ɁAxƂ̃g[hItlāA
  PROC_INT(0:4)}N`悤ȎsĂB
  ̎ł́APROC_INT0݂̂𗘗p邱ƂƂāA݃Rg[
  Ɋւwb_t@CiVR5500ł pic_icu.hAVR4131ł vr4131_icu.hj
  ɂĒ`ĂBȂÃ}NɂẮAݗvԍt0WX
  ɁAݗṽNÂ߂̒萔t1WX^ɑĖ߂B

  (ɁAMIPS3RÅݗvNA邽߂̏ĂB
   ̓Iɂ́ACauseWX^̃NAsĂB)

  2. ݃}XNiRAA݃Rg[j̐ݒ

  ݃}XN̐ݒɂẮASET_ICU_IPM}N`Aėp
  ĂB̃}N̒`́A݃Rg[Ɋւwb_t@C
  iVR5500ł pic_icu.hAVR4131ł vr4131_icu.hjɂĒ`ĂB

  3. ݋

  int_tableintmaskvfAMIPS3RAւ̊݃}XN擾A̒l
  Zbg邱ƂŊ݋ĂB

  4. bꃋ[`̌ďo

  t0WX^ɕۑĂ銄ݗvԍpāAint_table犄
  nh̃AhX擾āA݃nhĂяoĂB

  5. ݋֎~

  ݋֎~́AStatusWX^IErbgCPUbNԂ̔fɗp
  邽߂ɁA삷邱ƂłȂ̂ŁAStatusWX^EXLrbg
  𑀍삷邱ƂŁAĂB

  6. ݃Rg[̊ݗṽNA

  ̏́A݃nhōsƂőΉ̂ŁAĂȂB

ȏ̂悤ȎsĂ邪Aproc_interrupt_sys̎𗘗p
̃^[Qbgւ̃|[eBOsꍇ̃C^tF[Xȉɂ܂Ƃ߂B

(1) PROC_INT0                   ݗv̔f

y^[p[^z
		t0		ݗvԍ
		t1		ݗvNÂ߂̒萔

y@\z
MIPS3RÅݗvIP2̗vɑΉ銄݃Rg[́Aݗv
fBݗv𔻒fɁAt0ɊݗvԍAt1MIPS3RAp̊
ݗvNÂ߂̒萔āAproc_ICU_IPMɔԁB
AZuŏ}NƂĒ`Asys_support.S ŎgpB

(2) PROC_INT1                   ݗv̔f

y^[p[^z
		t0		ݗvԍ
		t1		ݗvNÂ߂̒萔

y@\z
ݗvIP3ɑΉꍇBȉAPROC_INT0ƓlB
AZuŏ}NƂĒ`Asys_support.S ŎgpB

(3) PROC_INT2                   ݗv̔f

y^[p[^z
		t0		ݗvԍ
		t1		ݗvNÂ߂̒萔

y@\z
ݗvIP4ɑΉꍇBȉAPROC_INT0ƓlB
AZuŏ}NƂĒ`Asys_support.S ŎgpB

(4) PROC_INT3                   ݗv̔f

y^[p[^z
		t0		ݗvԍ
		t1		ݗvNÂ߂̒萔

y@\z
ݗvIP5ɑΉꍇBȉAPROC_INT0ƓlB
AZuŏ}NƂĒ`Asys_support.S ŎgpB

(5) PROC_INT4                   ݗv̔f

y^[p[^z
		t0		ݗvԍ
		t1		ݗvNÂ߂̒萔

y@\z
ݗvIP6ɑΉꍇBȉAPROC_INT0ƓlB
AZuŏ}NƂĒ`Asys_support.S ŎgpB

(6)SET_ICU_IPM                  ݃Rg[ˑ̃}XNݒ

y@\z
݃Rg[̊݃}XNݒ肷B
AZuŏ}NƂĒ`Asys_support.S ŎgpB

ylz
̃}N`Ƃɂ́At0WX^t1WX^j󂵂Ă͂ȂȂB
t0ɂ́AݗvԍĂAt1ɂ́AݗvNA̒萔
ĂB

7.3 ̑

LɁAJ[lڐAɂ͕Kv͖AڐAɎQlƂȂ悤ȃ}NȂǂ
B

(1)CHECK_IPM                	݃}XÑ`FbN}N

yCAPIz
	CHECK_IPM(IPM p);

yp[^z
	IPM	p		`FbNׂ IPM ̒l

y@\z
݃}XN p Az肳Ă͈͂ɂ邩ǂ`FbNB
CŗpA}NƂĒ`Bxxx_ipm ŌĂяoB
(cpu_config.h)


ύX

2003N1224@JSPJ[l Release1.4 Ή (MIPS3ł̃T|[gJn)
2004N 218@ACA2.3.3CA7.3ǉ
2004N 331@3.4CAuTDvC
2004N 8 9@AC
